One of the fundamental functions performed by timer subsystems of microcomputers is a "match". A match event may be generally defined as occurring when the value of a free-running counter matches a value stored in a register. Most commonly, a prior art timer subsystem responds to a match event by either triggering a pre-selected signal transition at an output pin or by interrupting a host processor, or both.
In prior art timer subsystems, the set-up and generation of match events is relatively simple. Whenever the timer subsystem is enabled, each match of the counter and the register value produces the specified result. One need only write the desired value to the match register and enable the timer.
Such simple match generation logic suffers from several shortcomings in the context of a multi-channel autonomous timer subsystem such as the preferred embodiment of the present invention. One must resolve issues of potential match generation which occur during servicing of the timer channel by a service processor, multiple matches to a single value in the match register as the counter continuously cycles and the like.